Monday, February 21, 2011

Intel talks Poulson architecture for Itanium servers

Intel has revealed its Poulson micro-architecture for its upcoming refresh of Itanium server processors.

Without giving a release date, Intel said the chips will be fabbed at 32nm scale and have an eight-core design for what Chipzilla claims is improved throughput and greater efficiency.

The Poulson micro-architecture has 3.1 billion transistors per chip and 54MB of onchip memory, a 33 per cent increase in bandwidth speeds and maximum execution width doubled to 12 threads.

Itanium is for mission-critical server applications and Intel pitches it as a platform for mainframe and Unix applications but it has struggled to get consistent vendor support. Poulson will be backwards compatible for sockets and systems based on the Itanium 9300 series processors.

According to, Rory McInerney, microprocessor development group director at Intel, said, "We believe that we will be able to continue the momentum in Itanium through this decade."

Michael McNerney, director of server planning and marketing for HP business critical systems, told, "We don't see customers saying: 'I'm an all Itanium or all [Intel] Xeon shop.' We see them breaking it down by workload."

McNerney saw Itanium as much as a legacy support system as something for new server set-ups. ยต

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